This invention pertains generally to digital measurement of an unknown input voltage and more particularly to a simplified means to measure an input voltage of either polarity using dual slope integration.
Dual slope integration is a common technique used to perform an analog-to-digital conversion of an unknown input voltage. The technique basically involves establishing an equilibrium state in the measurement circuitry with no input applied, generally referred to as the auto-zeroing cycle; applying the unknown input voltage to an integrator for a fixed period of time, generally referred to as the signal-responsive cycle; and then digitally measuring the time required to return the integrator to a predetermined voltage level by application of a source of reference potential of opposite polarity to that of the input voltage, generally referred to as the reference cycle. In order to measure both positive and negative input voltages, it is generally necessary to have both a relatively positive and a relatively negative reference available during the reference cycle.
Dual slope integration circuits constructed according to the prior art have typically included either two separate sources of reference potential or have biased the signal at the input of the integrator so that it always has the same polarity regardless of the polarity of the input voltage. The latter technique requires a separate additional measurement to calculate a zero reference level and also requires a digital subtraction means such as up-down counters or an arithmetic logic unit to calculate the difference between the input voltage and the zero reference level.
Other known circuits measure input voltages of either positive or negative polarity by employing only one source of reference potential. This is accomplished by switching between zero volts and the reference potential at a fifty percent duty cycle rate to produce an average reference equal in value to one-half the reference potential. The value of this average reference is then altered by altering the switching duty cycle to either increase or decrease the average value of the reference, thus providing either a net positive reference or a net negative reference, respectively, as required for the measurement. Representative of these circuits is the LD110-LD111 Processor manufactured by Siliconix, Incorporated. This circuit does not comprise a dual slope integrator, but does rely on application of a known reference to an integrator to allow digital measurement of an analog signal. Circuits of this type are disadvantageous in that they require sophisticated logic circuitry to alter the reference switching duty cycle and to compensate for errors caused by finite switching times.
Yet another known circuit employing only one source of reference potential stores that reference on a capacitor. The charged capacitor is employed, by means of appropriate switching circuitry, as an opposite source of reference potential if required during a measurement. Such a circuit is used in the Data Precision Corporation Model 245 Digital Multimeter. These circuits are disadvantageous in that they require complicated analog switching techniques to reverse the polarity of the capacitor and to apply the stored voltage to the circuit when required.
In summary, all of the known digital measurement circuits involving integrating techniques are disadvantageous in that they require either two separate sources of reference potential, a single source of reference potential plus a switchable inverting amplifier, a single source of reference potential plus a capacitor and attendant complicated switching, or a single source of reference potential plus sophisticated logic curcuitry to perform digital subtraction or to alter a switching duty cycle.
Accordingly, it is the principal object of the present invention to provide a dual slope integration circuit for digitally measuring input voltages of either positive or negative polarity by employing a simple switchable resistive network connected to a single source of reference potential. Other and incidental objects of this invention will become apparent from a reading of this specification and an inspection of the accompanying drawings.
These objects are accomplished in accordance with the preferred embodiment of the invention by employing an input amplifier, an integrator, a sample and hold circuit, and a single polarity current source. During the aforementioned auto-zeroing cycle and signal-responsive cycle a positive reference current provided by the single polarity current source is exactly balanced by a negative reference current supplied from the sample and hold circuit. During the reference cycle, the polarity of the input voltage is sensed, and the positive reference current is accordingly altered by either increasing or decreasing it by a fixed amount, resulting in a net positive or net negative current flow into the integrator. Alteration of the positive reference current provided by the current source is effected by simply switching in an additional parallel resistor connected to a source of reference potential to increase the positive reference current, or by switching out the resistor originally connected to the source of reference potential to reduce the positive reference current. Both switched resistors are of equal value so that the reference current added in response to sensing one polarity equals the reference current subtracted in response to sensing the opposite polarity.